# Second CPU core missing - Technexion PICO-PI-IMX7 - Yocto **URL:** \ **Category:** General Discussions\ **Created:** [March 22, 2019, 8:28pm UTC](https://hub.mender.io/t/second-cpu-core-missing-technexion-pico-pi-imx7-yocto/936 "2019-03-22T20:28:07Z")\ **Posts on this page:** 10\ **Page:** 1
**Author:** ![jwinarske](https://yyz2.discourse-cdn.com/flex036/user_avatar/hub.mender.io/jwinarske/32/2015_2.png) [@jwinarske](https://hub.mender.io/u/jwinarske)\ **Post date:** [March 22, 2019, 8:28pm UTC](https://hub.mender.io/t/second-cpu-core-missing-technexion-pico-pi-imx7-yocto/936/1 "2019-03-22T20:28:07Z")
This image runs uni-proc on the i.mx7d. Any special flag to enable the second core? ---
**Author:** ![jorisoffouga](https://yyz2.discourse-cdn.com/flex036/user_avatar/hub.mender.io/jorisoffouga/32/64_2.png) [@jorisoffouga](https://hub.mender.io/u/jorisoffouga)\ **Post date:** [March 22, 2019, 8:45pm UTC](https://hub.mender.io/t/second-cpu-core-missing-technexion-pico-pi-imx7-yocto/936/2 "2019-03-22T20:45:20Z")
This image is only for the cortex a7, if you want to generate an image for the m4 cortex, you can do it here: [https://github.com/TechNexion/freertos-tn/tree/freertos\_1.0.1\_imx7d](https://github.com/TechNexion/freertos-tn/tree/freertos_1.0.1_imx7d) ---
**Author:** ![jwinarske](https://yyz2.discourse-cdn.com/flex036/user_avatar/hub.mender.io/jwinarske/32/2015_2.png) [@jwinarske](https://hub.mender.io/u/jwinarske)\ **Post date:** [March 22, 2019, 8:48pm UTC](https://hub.mender.io/t/second-cpu-core-missing-technexion-pico-pi-imx7-yocto/936/3 "2019-03-22T20:48:27Z")
Shouldn’t I see two CPU listed: root@imx7d-pico:~# cat /proc/cpuinfo processor : 0 model name : ARMv7 Processor rev 5 (v7l) BogoMIPS : 48.00 Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x0 CPU part : 0xc07 CPU revision : 5 Hardware : Freescale i.MX7 Dual (Device Tree) Revision : 0000 Serial : 0000000000000000 root@imx7d-pico:~# [0.005950] CPU: Testing write buffer coherency: ok [0.007378] CPU0: update cpu\_capacity 1024 [0.007408] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [0.009626] Setting up static identity map for 0x80100000 - 0x80100078 [0.010502] rcu: Hierarchical SRCU implementation. [0.012360] smp: Bringing up secondary CPUs … [0.014741] smp: Brought up 1 node, 1 CPU [0.014771] SMP: Total of 1 processors activated (48.00 BogoMIPS). [0.014793] CPU: All CPU(s) started in SVC mode. ---
**Author:** ![jwinarske](https://yyz2.discourse-cdn.com/flex036/user_avatar/hub.mender.io/jwinarske/32/2015_2.png) [@jwinarske](https://hub.mender.io/u/jwinarske)\ **Post date:** [March 25, 2019, 2:55pm UTC](https://hub.mender.io/t/second-cpu-core-missing-technexion-pico-pi-imx7-yocto/936/4 "2019-03-25T14:55:52Z")
I’m moving to the Technexion BSP: > **[TechNexion/edm-yocto-bsp](https://github.com/TechNexion/edm-yocto-bsp)** > > (Archived, please change to use tn-imx-yocto-manifest) Yocto Project manifests - TechNexion/edm-yocto-bsp ---
**Author:** ![texierp](https://yyz2.discourse-cdn.com/flex036/user_avatar/hub.mender.io/texierp/32/45_2.png) [@texierp](https://hub.mender.io/u/texierp)\ **Post date:** [March 25, 2019, 3:54pm UTC](https://hub.mender.io/t/second-cpu-core-missing-technexion-pico-pi-imx7-yocto/936/5 "2019-03-25T15:54:05Z")
Seems normal with [mainline kernel](https://community.nxp.com/thread/460616#comment-944890) in fact. ---
**Author:** ![jwinarske](https://yyz2.discourse-cdn.com/flex036/user_avatar/hub.mender.io/jwinarske/32/2015_2.png) [@jwinarske](https://hub.mender.io/u/jwinarske)\ **Post date:** [March 25, 2019, 5:34pm UTC](https://hub.mender.io/t/second-cpu-core-missing-technexion-pico-pi-imx7-yocto/936/6 "2019-03-25T17:34:51Z")
Sounds like u-boot is missing something, as I was using the u-boot build artifact from this build. ---
**Author:** ![Bart](https://avatars.discourse-cdn.com/v4/letter/b/f19dbf/32.png) [@Bart](https://hub.mender.io/u/Bart)\ **Post date:** [September 7, 2020, 11:03am UTC](https://hub.mender.io/t/second-cpu-core-missing-technexion-pico-pi-imx7-yocto/936/7 "2020-09-07T11:03:48Z")
I have tried this suggestion and it brings up the second core: [https://forum.digikey.com/t/pico-pi-imx7d-booted-with-only-1-cpu-at-1-0ghz/7634/4](https://forum.digikey.com/t/pico-pi-imx7d-booted-with-only-1-cpu-at-1-0ghz/7634/4) Couple of questions, 1. “Non secure” sounds as if it is something to avoid doing, can someone explain me what the weight of this setting is? 2. If this is a proper method, how do I set this in the Yocto project? Because now it only works temporarily after changing the environment variable in the u-boot menu at boot. 3. Is there an alternative approach to this? I would expect this (the soc using both cores) to work by default. Do I need to change the kernel? I am building from the tutorial by Joris on the warrior branch at the moment. ---
**Author:** ![Bart](https://avatars.discourse-cdn.com/v4/letter/b/f19dbf/32.png) [@Bart](https://hub.mender.io/u/Bart)\ **Post date:** [September 23, 2020, 2:45pm UTC](https://hub.mender.io/t/second-cpu-core-missing-technexion-pico-pi-imx7-yocto/936/8 "2020-09-23T14:45:40Z")
I have tried this suggestion: > [@Bluetooth on Technexion PICO-PI-IMX7](https://hub.mender.io/t/bluetooth-on-technexion-pico-pi-imx7/937/3): > > If it can help anyone, I (finally) found how to enable Bluetooth. You need to enable/reset the bluetooth controller using GPIO: echo 114 \> /sys/class/gpio/export echo "out" \> /sys/class/gpio/gpio114/direction cd /sys/class/gpio/gpio114 echo 1 \> value && sleep 1 && echo 0 \> value && echo 1 \> value There is probably a better way to do this, through rfkill, but I didn’t know anything about kernels and yocto a few weeks ago - so still learning. Then, btattach -B /dev/ttymxc6 -P bcm & Make sure… Three observations: - The 2nd core does indeed start, both CPU’s in HYP mode. - If I only update my board with the .mender file the u-boot config does not get updated. So on reboot the old u-boot config still applies. I need to replace the bootloader and SPL with dfu to the new version. Is this behaviour expected? I was expecting the new u-boot to get updated with the .mender file as well. - caam behaves differently depending on CONFIG\_ARMV7\_BOOT\_SEC\_DEFAULT CONFIG\_ARMV7\_BOOT\_SEC\_DEFAULT=y: (so single core active) ``` root@imx7d-pico:/lib# dmesg | grep caam [2.444686] caam 30900000.caam: Entropy delay = 3200 [2.450039] caam 30900000.caam: Instantiated RNG4 SH0 [2.509452] caam 30900000.caam: Instantiated RNG4 SH1 [2.514527] caam 30900000.caam: device ID = 0x0a16030000000000 (Era 8) [2.521108] caam 30900000.caam: job rings = 3, qi = 0 [2.672765] caam algorithms registered in /proc/crypto [2.687239] caam_jr 30901000.jr0: registering rng-caam [2.694308] caam 30900000.caam: caam pkc algorithms registered in /proc/crypto ``` CONFIG\_ARMV7\_BOOT\_SEC\_DEFAULT not defined: (dual core active) ``` [2.515625] caam 30900000.caam: Entropy delay = 3200 [2.551627] caam 30900000.caam: failed to acquire DECO 0 [2.556969] caam 30900000.caam: failed to instantiate RNG ``` The rescue image from Technexion does boot up the board with the two CPU’s in SVC mode, but it is unclear for me how they do that. ---
**Author:** ![Bart](https://avatars.discourse-cdn.com/v4/letter/b/f19dbf/32.png) [@Bart](https://hub.mender.io/u/Bart)\ **Post date:** [September 27, 2020, 3:08pm UTC](https://hub.mender.io/t/second-cpu-core-missing-technexion-pico-pi-imx7-yocto/936/9 "2020-09-27T15:08:05Z")
I have tried to narrow this down. It looks like SMP it actually trying to get cpu1 up but is failing when invoking callbacks. Looking at the call below to cpu\_up for cpu 1, it returns an error code -38 although the return value is not used in the code normally. I have verified this by printing the value for cpu and the return value with pr\_info on the terminal. > This traces all the way back to the moment the callback is invoked for CPUHP\_BRINGUP\_CPU (cpuhp\_state #85) where **ret** get’s the value -38, which if I’m not mistaken means ENOSYS. > The callback invocations for this list below did pass without this error just before that: 1; CPUHP\_CREATE\_THREADS 2; CPUHP\_PERF\_PREPARE 35; CPUHP\_WORKQUEUE\_PREP 37; CPUHP\_HRTIMERS\_PREPARE 40; CPUHP\_SMPCFD\_PREPARE 41; CPUHP\_RELAY\_PREPARE 44; CPUHP\_RCUTREE\_PREP 62; CPUHP\_TIMERS\_PREPARE Hopefully someone will see my post and share some experience in the matter, or point me to a place where this question might best be answered. ---
**Author:** ![neuberfran](https://yyz2.discourse-cdn.com/flex036/user_avatar/hub.mender.io/neuberfran/32/369_2.png) [@neuberfran](https://hub.mender.io/u/neuberfran)\ **Post date:** [January 13, 2022, 6:43pm UTC](https://hub.mender.io/t/second-cpu-core-missing-technexion-pico-pi-imx7-yocto/936/10 "2022-01-13T18:43:26Z")
@Bart@jwinarske I also have this board. I’ve used (I’m using it) Yocto mender dunfell and Yocto technexion Hardknott and I’m very interested in using OS on m4 for 1 RPMsg project I have.