# Interest in a Xilinx Zynq Board Integration?

**URL:** <https://hub.mender.io/t/interest-in-a-xilinx-zynq-board-integration/662>\
**Category:** General Discussions\
**Created:** [June 3, 2019, 3:45pm UTC](https://hub.mender.io/t/interest-in-a-xilinx-zynq-board-integration/662 "2019-06-03T15:45:23Z")\
**Posts on this page:** 1\
**Showing post:** 3

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**Author:** ![niquoi](https://avatars.discourse-cdn.com/v4/letter/n/c0e974/32.png) [@niquoi](https://hub.mender.io/u/niquoi)\
**Post date:** [June 4, 2019, 8:02am UTC](https://hub.mender.io/t/interest-in-a-xilinx-zynq-board-integration/662/3 "2019-06-04T08:02:17Z")

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Hi Bryan,

I am also integrating Mender on a Zynq 7000 series board using Petalinux 2018.3.  
To balance what you said, there are some Xilinx wiki pages on how to work with pure Yocto. Plus I did not have particular problems using _rocko_ version of Yocto.

However, I agree on **using Petalinux being the main challenge** : I have been struggling (and still am) with Petalinux scripts which are not open-source and perform obscure and awkward Yocto files generation…  
I think having a Xilinx Zynq board integration could be nice, but I am afraid it should not use Petalinux tools, because it seem to require a lot of work - sometimes only just trying to bypass petalinux logic. Also it does not seem stable enough, they regularly change a lot of stuff between versions.

Concerning FIT images:  
Maybe this is not what you want, but I managed to disable FIT image generation to use a zImage instead (compatible with mender), ask me if you need help for that !

Nicolas

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